| Deel Nee | Fabrikant | Toepassing |
|---|
| ISPLSI3256-70LM | Lattice | "High density programmable logic, 128 I/O pins, 11000 PLD gates, 384 registers, 77MHz" |
| 5962-89839072A | Lattice | "High performance E2CMOS PLD generic array logic, 7.5ns" |
| ISPLSI81080V-60LB272 | Lattice | 60 MHz 3.3V in-system prommable superBIG high density PLD |
| MACH435Q-25JC | Lattice | "High-density EE CMOS programmable logic, 128 macrocells, 25ns, quarter power" |
| ISPLSI1032E-90LT | Lattice | "In-system programmable high density PLD, 10ns" |
| M4LV-32/32-10VC48 | Lattice | "High-performance E2CMOS in-system programmable logic, 3.3-V Vcc, 32 macrocells, 32 I/Os, 10ns" |
| PALCE16V8Z-25PC | Lattice | "EE CMOS universal programmable array logic, zero power, 25ns" |
| GAL20XV10B-10LJ | Lattice | "High-speed E2CMOS PLD generic array logicTM (40 x 40), 10ns, low power" |
| M4A3-384/192-12AI | Lattice | "12ns, 3.3V high performance E2 CMOS in-system programmable logic" |
| M4A3-192/96-10VC | Lattice | 10ns high performance E2 CMOS in-system programmable logic |
| MACH130-20JC | Lattice | "High-density EE CMOS programmable logic, 20ns" |
| PALCE16V8Z-25JI | Lattice | "EE CMOS universal programmable array logic, zero power, 25ns" |
| M5-384/192-7AC | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4A5-256/128-12AI | Lattice | "12ns, 3.3V high performance E2 CMOS in-system programmable logic" |
| PALCE16V8Z-25PC | Lattice | "EE CMOS universal programmable array logic, zero power, 25ns" |
| MACH131SP-12YC | Lattice | "High-performance EE CMOS programmable logic, 64 macrocells, 64 I/Os, in-system programmable, 12ns" |
| M5-384/160-15HC | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-320/160-7YC | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-320/160-10HI | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-512/120-7HC | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5-512/160-15HC | Lattice | 15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-128/104-10VI | Lattice | 10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-256/160-7YC | Lattice | 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M5LV-256/104-5YC | Lattice | 5ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device) |
| M4-128/64-12YI | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 128 macrocells, 64 I/Os, 12ns |
| GAL22V10B-25QJ | Lattice | High Performance E2CMOS PLD, 25ns, quarter power |
| M4A3-96/48-55VC | Lattice | 5.5ns high performance E2 CMOS in-system programmable logic |
| MACH210A-12JC | Lattice | High-density EE CMOS programmable logic, 64 macrocells, 32 outputs, 38 Inputs, 64 flip-flops; 2 clock choices, 12ns, input pull-up resistors |
| M4-32/32-18VI48 | Lattice | High-performance E2CMOS in-system programmable logic, 5V Vcc, 32 macrocells, 32 I/Os, 18ns |
| PALCE22V10Z-25JC | Lattice | EE CMOS versatile PAL device, zero power, 25ns |
